DescriptionWith the introduction of the RISC-V instruction set architecture (ISA) and its rapidly growing ecosystem and community, there may be a unique opportunity to broaden participation in computer architecture design to groups who have been traditionally severely underrepresented. The RISC-V being an open, royalty-free, ISA with many extension specifications, it offers a high degree of customization and represents an attractive option for many applications, ranging from machine learning accelerators to secure computer systems design. In this workshop, we will present the BRISC-V toobox - the Boston University RISC-V based architecture design exploration suite for education and research. BRISC-V is comprised of different processor architectures, a graphical user-interface (GUI) tool to automate fast complete system generations, and a RISC-V assembly simulator. During the session, we will (1) introduce the BRISC-V tool, (2) show its functionalities, and (3) run hands-on design exploration examples with the attendees.